In the present talk we discuss the development of the epitaxial technique Template-Assisted Selective Epitaxy (TASE) and its application for the monolithic integration of scaled III-V active photonic devices on silicon. A unique advantage of TASE for silicon photonics applications is that it enables a truly local integration of III-V material at precisely defined positions, […]
Shape optimization techniques were quite recently applied to photonic components but to the best of our knowledge, no application to optical computing has been reported yet. Here, we present the design of a photonic integrated circuit, composed of shape optimized passive components, performing a matrix-vector product. A ≈ 2000 times gain on the overall footprint […]
We present a brightness- and power-scalable polarization beam combining scheme for high-power, broad-area semiconductor lasers. To achieve the beam combining, we employ Lyot-filtered optical reinjection from an external cavity, which forces lasing of the individual diodes on interleaved frequency combs with overlapping envelopes and enables a high optical coupling efficiency. We demonstrate how repeatedly introduced […]
Neural node components consisting of III-V nanowire devices are introduced. This allows for the construction of a small footprint specialized neural network. A broadcasting strategy is developed which removes the need for inter-node wiring. As a model system, an insect brain navigational circuit is chosen and successfully emulated using the introduced nodes and network architecture. […]
IS05–Effect of Nonlinearities on Directed Optical Logic Gates Using Integrated Semiconductor Ring Lasers
Nonlinearities in the semiconductor ring laser (SRL) are incorporated in the analysis of directed optical logic gates and their effects on the output are studied. The paper discusses the effects of gain medium linewidth, internal quantum efficiency and self and cross gain saturation on the output of directed optical NOT gate implemented using SRLs.
High speed, low power, low leakage, and low noise circuits are extremely essential for modern VLSI chips. Since on-chip cache memories consume appreciable amount of the total chip area and energy, high performance and low power Static Random-Access Memories (SRAMs) are needed for high performance and low power electronic systems. A hybrid FET-LET 6T SRAM, […]