IS06–Hybrid Electronic-Photonic Integrated Circuits: Hybrid FET-LET SRAM

High speed, low power, low leakage, and low noise circuits are extremely essential for modern VLSI chips. Since on-chip cache memories consume appreciable amount of the total chip area and energy, high performance and low power Static Random-Access Memories (SRAMs) are needed for high performance and low power electronic systems. A hybrid FET-LET 6T SRAM, with the access transistors being replaced by Light Effect Transistors (LETs), has been proposed and analytically analyzed. Numerical analyses reveal that a prototype hybrid SRAM array of size 512KB show a factor of 18 and 17 reduction in read delay and read energy, respectively; and 2 and 4 reduction in write delay and write energy, respectively, compared to the conventional 6T SRAMs

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